Intel has announced a major milestone in its semiconductor manufacturing comeback: the 18A-P process node has officially entered risk production on schedule. The announcement, made at the 2026 VLSI Symposium in Honolulu, demonstrates that Intel is executing on its roadmap commitments and advancing its foundry business with genuine momentum under CEO Lip-Bu Tan’s leadership.
The 18A-P is the performance-optimized evolution of Intel’s 18A process, which already features RibbonFET gate-all-around transistors and PowerVia backside power delivery — two major architectural innovations that place Intel at the leading edge of semiconductor technology. The 18A-P upgrade delivers measurable improvements: 9% higher performance at equivalent power levels, or 18% lower power consumption at the same performance target compared to standard 18A.
Intel also introduced Power Boost with the 18A-P, a dual-contact, low-resistance transistor option specifically designed to increase drive current and enable higher operating frequencies. Combined with thermal resistance improvements of 20% to 40% and 10% to 30% better via resistance, the 18A-P delivers a comprehensive set of gains that make it highly competitive with the most advanced process nodes from TSMC and Samsung.
Crucially, the 18A-P is fully compatible with Intel 18A design rules, meaning customers can reuse existing intellectual property and design flows without modification — dramatically reducing the cost and complexity of adopting the new process. This compatibility is a significant advantage for attracting foundry clients who have already invested in designing for Intel 18A.
The most closely watched potential deal involves Apple. According to reports from The Wall Street Journal and analyst Ming-Chi Kuo, Apple and Intel have reached a preliminary agreement for Intel to manufacture certain chips using the 18A process family, with shipments potentially beginning in 2027. Apple’s interest in Intel Foundry for entry-level M-series chips would represent a transformative win for Intel’s contract manufacturing business.
Looking further ahead, Intel presented research at the VLSI Symposium on future-generation technologies including monolithic CFET inverters, gallium nitride power devices integrated with silicon logic, and subtractive ruthenium interconnects with airgap integration achieving roughly 35% capacitance reduction versus copper. These research bets position Intel to maintain a competitive roadmap into the next decade of semiconductor scaling.
